The present invention relates to automatic testing equipment for testing integrated circuits and more specifically to self calibration of pin electronics.
The testing of integrated circuits presently involves the use of automatic test equipment (ATE) 100. The ATE includes a central control unit 110 that oversees the ATE as well as a plurality of channel cards 120. Each channel card 120 can be associated with a plurality of channels. Each pin of an integrated circuit device, known in the art as the “device under test” or DUT, is coupled to one of the channels of the ATE. A channel in the ATE is defined by the electronics that are associated with a single pin of the DUT. In general, a pin of the DUT is electrically coupled to pin electronics 130. Pin electronics 130 include, but is not limited to one or more of the following, a comparator, a load, a driver, an analog-to-digital converter (ADC), a digital-to-analog converter (DAC) and a parametric measurement unit (PMU). Each channel card 120 includes a levels generator 140. A levels generator 140 generates analog reference levels for use by the pin electronics 130. The levels generator 140 includes a plurality of DACs that each generates a reference level. Multiple references levels may be generated for each sub-circuit of the pin electronics including the comparator, driver, load or other parts of the pin electronics.
The pin electronics 130 need to be calibrated in order to meet the specifications of the tester manufacturer, so that the ATE will work for its intended purpose. For example, the pin electronics 130 can experience voltage, offset, first order nonlinearity (gain) and second order non-linearities. If the pin electronics are not properly calibrated, the ATE 100 will not be capable of accurately testing the integrated circuit devices.
In general, in order to calibrate the pin electronics 130 for each channel, the pin electronics 130 are coupled to a central or quasi-central resource 110 of the automatic testing equipment's analog sub-system which performs calibration one pin at a time. As shown in FIG. 1, the central system calibration resource 110 provides the calibration signals and measures the result of the calibration signal for each individual pin electronics channel. All of the calibration resources are provided in this central location. The centrally located calibration resources are coupled to each pin through a matrix line. The test system's main processor controls calibration relays 150 in order to select the pin electronics to calibrate.
Because of sensitivities to conditions, such as temperature, the pin electronics need to be recalibrated on a regular basis. If a large temperature change occurs during testing, the pin electronics need to be recalibrated. As a result, the DUTs would need to be disconnected during recalibration, since the recalibration process requires use of the output pin. Because the prior art calibration systems for ATE have used at best quasi-central resources, require disconnecting the DUTs and the DUT interface board, and can include thousands of pin electronics circuits, the recalibration times can be greater than an hour for a single ATE.